1. Field of the Invention
The present invention generally relates to LSI design aiding apparatuses and, more particularly, to an LSI design aiding apparatus in which estimation of electric current consumption is provided.
2. Description of the Related Art
Recently, mobile information tools such as mobile phones and notebook computers are widely used. With this, there is a growing demand for reduced power consumption. LSI logic circuits are designed with strong emphasis on reducing power consumption. Associated with this, there is a need to precisely estimate current consumption in the designed circuit. Better estimation of current consumption can be made on the transistor level rather than on the level of gates including individual AND, OR, NOT logical elements. However, estimation of current consumption in an integrated circuit on the transistor level requires a relatively long period of time. With the present-day level of integration, it is difficult, on a practical level, to estimate current consumption in an integrated circuit on the transistor level.
Japanese Laid-Open Patent Application No. 2-136755 discloses a method for estimating current consumption on the gate level. The disclosed method involves the steps of executing a logical simulation in a target logic circuit subject to estimation, determining the number of events at the output terminals of the logical elements based on the result of the simulation, and estimating the current consumption of the whole circuit based on the number of events determined and predetermined information relating to the current consumed by the logical elements.
However, the conventional method for estimating the consumed current on the gate level has a drawback in that such a method is less precise than a method for transistor-level estimation of the consumed current. The transistor-level estimation of the consumed current has a drawback in that it takes so long that it cannot be practically applied to a large-scale integration circuit. Thus, the conventional estimation method does not provide precise and efficient estimation of the consumed current so that it is difficult to design a logical circuit of low power consumption based on an estimation of the consumed current obtained by the conventional method.